NVIDIA
ASIC Verification Engineer
About this role
This role is at NVIDIA's Bengaluru graphics team, which designs GPUs and Tegra SOCs. The engineer plans and carries out functional verification of IPs, clusters and SOCs, and owns verification of complex RTL designs. Work includes building regression plans, closing functional and code coverage, and doing pre-silicon checks such as XPROP simulations and GLS. The engineer works with hardware architects, designers, FPGA and software teams, and also helps with post-silicon verification and debug. It suits engineers with some ASIC design or verification experience.
NVIDIA is hiring for ASIC Verification Engineer, a full-time role based in Hyderabad (hybrid).
Who can apply: 1+ years. Skills: ASIC verification, SystemVerilog, UVM, Python, Perl.
Hirastra checked that this opening is live. Apply directly through the official posting; applying is always free.
What you'll do
- Own ASIC verification of IP/cluster for complex RTL designs
- Work with hardware architects and designers on implementation choices
- Work with performance verification teams on dynamic simulation and formal verification
- Ensure functional and code coverage of the RTL being verified
- Partner with FPGA and software teams so software is tested
- Take part in post-silicon verification and debug
What you need
- BS/MS or equivalent experience
- 1+ years of design experience
- Experience in ASIC verification of complex design units on at least one or two projects
- Background with design and verification tools such as VCS or equivalent, and debug tools like Debussy and GDB
- Exposure to SystemVerilog and UVM is highly desired
- Location
- Hyderabad
- Work mode
- Hybrid
- Experience
- 1+ years
- Pay
- ₹20–35 LPA (Est.)
- Type
- Full-time job, Developer
- Added
- 26 October 2026
Skills
- ASIC verification
- SystemVerilog
- UVM
- Python
- Perl
"Est." = Hirastra's estimate based on market data, not an official figure.
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