NVIDIA
ASIC Verification Engineer
About this role
This role sits in NVIDIA's graphics team in Bengaluru, which designs GPUs and Tegra SoCs. The engineer verifies RTL designs at IP, cluster and SoC level, building regression plans and closing functional and code coverage. Day to day involves working with hardware architects and designers, running pre-silicon checks such as XPROP simulations and gate-level simulation, and supporting FPGA and software teams. It suits someone with a little hands-on design or verification experience who knows simulation and debug tools.
NVIDIA is hiring for ASIC Verification Engineer, a full-time role based in Bengaluru.
Who can apply: 1+ years. Skills: SystemVerilog, UVM, ASIC Verification, Python, Perl.
Hirastra checked that this opening is live. Apply directly through the official posting; applying is always free.
What you'll do
- Own ASIC verification of IP/cluster-level RTL designs
- Work with HW architects and designers on implementation choices
- Work with performance verification teams on dynamic simulation and/or formal verification
- Ensure functional and code coverage of the RTL being verified against specifications
- Partner with FPGA and software teams so software is tested
- Take part in post-silicon verification and debug
What you need
- BS/MS or equivalent experience
- 1+ years of design experience
- Experience in ASIC verification of complex design units on one or two projects
- Background with simulation tools such as VCS or equivalent, and debug tools like Debussy and GDB
- Exposure to SystemVerilog and UVM methodology is highly desired
- Location
- Bengaluru
- Work mode
- See listing
- Experience
- 1+ years
- Pay
- ₹20–35 LPA (Est.)
- Type
- Full-time job, Developer
- Added
- 27 October 2026
Skills
- SystemVerilog
- UVM
- ASIC Verification
- Python
- Perl
"Est." = Hirastra's estimate based on market data, not an official figure.
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