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NVIDIA

DFT Engineer - Hardware

About this role

NVIDIA's Design-for-Test team in Bengaluru works on DFT architecture, verification and post-silicon validation for complex semiconductor chips. The DFT Engineer handles DFT end to end, from RTL design and gate-level scan insertion through verification to silicon bring-up. The role includes developing and deploying DFT methodologies for upcoming products and working with multi-functional teams to add DFT features into the chip. Occasional travel and some late-hour online meetings occur during critical milestones. It suits electrical engineering graduates with about 2+ years of experience; the position is full-time and hybrid.

NVIDIA is hiring for DFT Engineer - Hardware, a full-time role based in Bengaluru (hybrid).

Who can apply: 2+ years. Skills: DFT, Scan ATPG, JTAG, RTL, Static timing analysis, Python.

Hirastra checked that this opening is live. Apply directly through the official posting; applying is always free.

What you'll do

  • Own DFT from RTL design to gate-level scan insertion, verification and silicon bring-up
  • Verify JTAG, boundary scan, security mechanisms and test clocking across test modes and ATPG configurations
  • Verify and bring up Scan ATPG and other DFT features on silicon
  • Develop and deploy DFT methodologies for next-generation products
  • Work with multi-functional teams to incorporate DFT features into the chip

What you need

  • BSEE or MSEE from a reputed institution, or equivalent experience, with 2+ years of experience
  • Knowledge of static timing analysis, ECO, ASIC/logic design flow, HDL and digital logic design
  • Experience in RTL and gate-level verification and simulation
  • Familiarity with BIST architecture and JTAG/IEEE 1149.1/IEEE 1500
  • Strong DFT knowledge in Scan ATPG, compression techniques and memory test
  • Analytical and problem-solving skills with scripting in Perl or Python
Location
Bengaluru
Work mode
Hybrid
Experience
2+ years
Pay
₹25–40 LPA (Est.)
Type
Full-time job, Developer
Added
27 October 2026

Skills

  • DFT
  • Scan ATPG
  • JTAG
  • RTL
  • Static timing analysis
  • Python

"Est." = Hirastra's estimate based on market data, not an official figure.

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