Intel
Silicon Package Design Engineer
- Location
- Bengaluru
- Work mode
- Hybrid
- Experience
- 0–6 yrs exp · Freshers OK
- Pay
- ₹10–18 LPA (Est.)
- Type
- Full-time job, Developer
- Added
- 14 November 2026
About this role
This role sits in Intel's Assembly and Test Technology Development (ATTD) Design group in Bangalore, which works on semiconductor packaging and silicon-package-board performance. The engineer creates physical layout designs for silicon packages, assembly test chips and Intel's EMIB multi-die bridge technology. Typical work includes substrate fit and routing studies, bump pattern creation, signal routing and power grid planning, and layout verification checks such as DRC and electromigration analysis. The role involves working with customers and electrical engineers on signal integrity and power delivery. It suits engineering graduates with hands-on package or PCB design exposure, or Master's graduates in a related field. The role follows a hybrid work model.
Intel is hiring for Silicon Package Design Engineer, a full-time role based in Bengaluru (hybrid).
Who can apply: 0–6 yrs exp · Freshers OK. Skills: Cadence, Siemens EDA, Package/PCB design, Python, Perl, SKILL.
Hirastra checked that this opening is live. Apply directly through the official posting; applying is always free.
What you'll do
- Develop physical layouts for silicon packages, assembly test chips and EMIB technologies
- Create bump patterns and placements that follow design rules
- Plan signal routing and power grid placement to meet electrical and manufacturing standards
- Run layout verification including routing checks, connectivity validation, DRC and electromigration analysis
- Work with customers and electrical engineers on signal integrity, power delivery and feasibility studies
- Resolve layout tool and workflow issues and document designs in PLM systems
What you need
- Bachelor's in Electrical, Electronics, Computer Engineering or STEM field with 1–6 years of silicon packaging design experience (projects, internships, coursework or training count), or a Master's in a related field with no prior experience
- Proficiency in Cadence or Siemens EDA tools for package/PCB design
- Familiarity with Python, Perl, Linux and/or SKILL
- Strong understanding of electrical field theory and electronics fundamentals
Skills
- Cadence
- Siemens EDA
- Package/PCB design
- Python
- Perl
- SKILL
"Est." = Hirastra's estimate based on market data, not an official figure.
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