Infineon
Trainee Engineer (Digital Design Verification)
- Location
- Bengaluru
- Work mode
- See listing
- Experience
- 0–1 yrs exp · Freshers OK
- Pay
- ₹10–16 LPA (Est.)
- Type
- Full-time job, Developer
- Added
- 3 November 2026
About this role
Infineon's Silicon Engineering team in Bengaluru works on Graphics and Security IP and needs its circuit designs verified for functional correctness. The Trainee Engineer helps build simulation and emulation testbenches using SystemVerilog and UVM. Day to day, the trainee works with senior engineers, learns the architecture of Graphics IP, runs regressions and debugs failures in waveform viewers. The role suits recent electronics, computer engineering or computer science graduates with a grounding in digital design and SystemVerilog.
Infineon is hiring for Trainee Engineer (Digital Design Verification), a full-time role based in Bengaluru.
Who can apply: 0–1 yrs exp · Freshers OK. Skills: SystemVerilog, UVM, Digital Design, Python, Computer Architecture.
Hirastra checked that this opening is live. Apply directly through the official posting; applying is always free.
What you'll do
- Assist in developing, maintaining and enhancing block-level and chip-level simulation testbenches
- Write verification components such as drivers, monitors, predictors and scoreboards in SystemVerilog and UVM
- Work with senior engineers to bring up emulation testbenches for pre-silicon validation
- Learn Graphics IP architecture and map out verification plans
- Run regressions, debug hardware failures using waveform viewers and write functional coverage covergroups
What you need
- Bachelor's or master's degree in Electronics Engineering, Computer Engineering, Computer Science or a related field, with graduation within the last 12 months
- Strong foundational knowledge of SystemVerilog
- Exposure to UVM through coursework, lab projects or internships
- Solid understanding of digital logic design, computer architecture and FIFO/arbitration mechanisms
- Basic scripting skills in Python, Perl or Bash
Skills
- SystemVerilog
- UVM
- Digital Design
- Python
- Computer Architecture
"Est." = Hirastra's estimate based on market data, not an official figure.
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