Micron Technology
Engineer, HBM Layout
- Location
- Hyderabad
- Work mode
- See listing
- Experience
- 2–5 yrs exp
- Pay
- ₹12–22 LPA (Est.)
- Type
- Full-time job, Developer
- Added
- 14 November 2026
About this role
Micron's HBM team in Hyderabad works on High Bandwidth Memory used in AI and high-performance computing products. This layout engineer role covers the physical layout of analog, mixed-signal and custom digital blocks, along with full-chip integration support. Day to day, the engineer creates block layouts and runs verification checks such as LVS, DRC and Antenna. The engineer also estimates area and time, reviews sub-block work from peers and coordinates with engineering teams across Micron's global sites. The role suits engineers with 2–5 years of analog or custom layout experience in advanced CMOS nodes.
Micron Technology is hiring for Engineer, HBM Layout, a full-time role based in Hyderabad.
Who can apply: 2–5 yrs exp. Skills: Analog layout, Cadence VLE/VXL, Calibre DRC/LVS, FinFET, Mixed-signal.
Hirastra checked that this opening is live. Apply directly through the official posting; applying is always free.
What you'll do
- Design and develop layouts for critical analog, mixed-signal and custom digital blocks, and support full-chip integration
- Perform layout verification (LVS/DRC/Antenna), quality checks and documentation
- Deliver block-level layouts on time with acceptable quality
- Handle area/time estimation and scheduling across multiple projects
- Guide peers on sub-block layouts and review critical items
What you need
- BE or MTech in Electronic/VLSI Engineering (exceptional Diploma holders considered)
- 2–5 years of analog/custom layout experience in advanced CMOS (Planar, FinFET)
- Expertise in Cadence VLE/VXL and Mentor Graphics Calibre DRC/LVS
- Hands-on layout of blocks such as PLL, ADC, DAC, LDO, Bandgap and comparators
- Good grasp of analog layout fundamentals such as matching, electromigration, latch-up and IR-drop
- Excellent verbal and written communication skills
Skills
- Analog layout
- Cadence VLE/VXL
- Calibre DRC/LVS
- FinFET
- Mixed-signal
"Est." = Hirastra's estimate based on market data, not an official figure.
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