Cadence
Mixed-Signal Systems & Verification Engineer
ClosedThis opening has closed. New ones like it are posted on WhatsApp every day.
Get new jobs on WhatsApp- Location
- Bengaluru
- Work mode
- See listing
- Experience
- New graduates encouraged
- Pay
- ₹10–18 LPA (Est.)
- Type
- Full-time job, Developer
- Added
- 2 October 2026
About this role
Cadence is an electronic design automation company that provides software, hardware and IP for designing semiconductor chips. This Bangalore role is an AMS verification position in a hands-on development team. The engineer writes simulation-efficient behavioral models of analog and RF blocks in SystemVerilog, checks them against analog schematics, and integrates them with RTL. The work also includes building test benches and assertions to verify analog functionality against specifications. New graduates are explicitly encouraged to apply.
Cadence was hiring for Mixed-Signal Systems & Verification Engineer, a full-time role based in Bengaluru.
Who can apply: New graduates encouraged. Skills: SystemVerilog, Verilog-AMS, RNM, Python, Perl, Virtuoso.
This opening has closed (closed on 2026-10-17). Open roles like it are listed on this page and at hirastra.com/jobs.
What you'll do
- Develop accurate, simulation-efficient analog behavioral models for analog/RF blocks in SystemVerilog
- Verify that behavioral models accurately represent the analog schematics
- Integrate the models with RTL
- Verify analog functionality against design specs using test benches, test scenarios and assertions
- Document modeling and verification results for formal review
What you need
- Experience developing and verifying real-number behavioral models in SystemVerilog
- Understanding of SystemVerilog, RNM, UDN/UDT/UDR, wreal and Verilog-AMS
- Basic understanding of AMS blocks such as filters, ADC, DAC, VCO, A/DPLL, SerDes, LNA and Mixer
- Working experience in low power architecture and in Cadence Virtuoso Schematic Composer and ADE
- Experience with analog assertion based verification
- Scripting experience in Perl or Python, plus good communication skills
Skills
- SystemVerilog
- Verilog-AMS
- RNM
- Python
- Perl
- Virtuoso
"Est." = Hirastra's estimate based on market data, not an official figure.
All Cadence jobs and internships
More like this: IT jobs in Bengaluru, Python developer jobs for freshers, Jobs and internships for final year students (2027 batch), IT jobs for freshers, Software developer jobs