NVIDIA
ASIC Design Engineer, High Speed IO
- Location
- Bengaluru
- Work mode
- See listing
- Experience
- 2+ yrs exp
- Pay
- ₹18–32 LPA (Est.)
- Type
- Full-time job, Developer
- Added
- 2 November 2026
About this role
NVIDIA's Bengaluru team is hiring RTL design engineers for high-speed IO IP used in automotive chips, covering UFS, Ethernet, PCIe and USB. The designer takes a feature from protocol understanding and micro-architecture through RTL implementation, timing closure and silicon validation support. The work involves trade-offs between feature, performance, power and area, and regular collaboration with architects, verification, timing, VLSI and physical design teams. It suits engineers with solid digital design and verification fundamentals and a couple of years of experience.
NVIDIA is hiring for ASIC Design Engineer, High Speed IO, a full-time role based in Bengaluru.
Who can apply: 2+ yrs exp. Skills: RTL Design, Digital Design, UFS, PCIe, Ethernet, USB.
Hirastra checked that this opening is live. Apply directly through the official posting; applying is always free.
What you'll do
- Own micro-architecture and RTL development of design modules
- Micro-architect features to meet performance, power and area requirements
- Work with hardware architects to define critical features
- Partner with verification teams to verify implemented features
- Collaborate with timing, VLSI and physical design teams on timing, interfaces and routability
- Support silicon validation
What you need
- BTech/MTech in EE, ECE or a similar stream
- 2+ years of experience building complex units and CPU/micro-controller based sub-systems
- Strong digital design and verification fundamentals
- Good debugging, analytical and problem-solving skills
- Strong interpersonal skills and ability to collaborate with multi-geography, cross-cultural teams
Skills
- RTL Design
- Digital Design
- UFS
- PCIe
- Ethernet
- USB
"Est." = Hirastra's estimate based on market data, not an official figure.
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